AMD has released a new revision guide (260KB .pdf) for the 762 controller (MPX Northbridge). The C0 revision of the Northbridge fixes this problem:
Lengthy sequences of memory mapped I/O cycles from a processor to either PCI or AGP that occur during periods of high bus traffic resulting in high bus latency may cause a subsequent sequence of memory mapped I/O operations to the PCI and/or AGP buses that are strongly ordered with respect to the two processors to be performed in a different order. ... This failure can only occur in systems with both processors installed and running and has only been identified by AMD in conjunction with diagnostics.
No idea when this revision will hit the market but it\'s an interesting sign that development and support of the MPX chipset is not dead even though Opteron and Athlon 64 are almost on us.
짧은글 일수록 신중하게.